mos_6502_datapath.rtl Architecture Reference

Architecture >> mos_6502_datapath::rtl

Components
accumulator	<Entity accumulator>
index_register	<Entity index_register>
data_input_latch	<Entity data_input_latch>
data_output_latch	<Entity data_output_latch>
status_register	<Entity status_register>

Signals
load_ABH	std_ulogic
load_ABL	std_ulogic

Instantiations
acc	accumulator <Entity accumulator>
x_reg	index_register <Entity index_register>
y_reg	index_register <Entity index_register>
status_register	status_register <Entity status_register>
abh_reg	index_register <Entity index_register>
abl_reg	index_register <Entity index_register>
data_input_latch	data_input_latch <Entity data_input_latch>
data_output_latch	data_output_latch <Entity data_output_latch>

Member Data Documentation

abh_reg

abh_reg index_register

Instantiation

abl_reg

abl_reg index_register

Instantiation

acc

acc accumulator

Instantiation

accumulator

accumulator

Component

data_input_latch [1/2]

data_input_latch

Component

data_input_latch [2/2]

data_input_latch data_input_latch

Instantiation

data_output_latch [1/2]

data_output_latch

Component

data_output_latch [2/2]

data_output_latch data_output_latch

Instantiation

index_register

index_register

Component

load_ABH

load_ABH std_ulogic

Signal

load_ABL

load_ABL std_ulogic

Signal

status_register [1/2]

status_register

Component

status_register [2/2]

status_register status_register

Instantiation

x_reg

x_reg index_register

Instantiation

y_reg

y_reg index_register

Instantiation

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The documentation for this design unit was generated from the following file:

• cores/ricoh_2A03/datapath/core.vhdl