RTL architecture of the program counter low register. More...
Architecture >> program_counter_low::rtlProcesses | |
PROCESS_12 | ( signal_PCL_PCL , signal_ADL_PCL , program_counter_register , bus_ADL ) |
PROCESS_13 | ( program_counter_select_register , signal_1_PC ) |
PROCESS_14 | ( phi2 ) |
Signals | |
program_counter_register | std_ulogic_vector ( 7 downto 0 ) := ( others = > ' 0 ' ) |
increment_register | std_ulogic_vector ( 7 downto 0 ) := ( others = > ' 0 ' ) |
program_counter_select_register | std_ulogic_vector ( 7 downto 0 ) := ( others = > ' 0 ' ) |
RTL architecture of the program counter low register.
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