adl_open_drain_mosfet Entity Reference

Open drain MOSFET for ADL bus implementation. More...

Entities
adl_open_drain_mosfet.rtl	architecture

Ports
signal_0_ADL0	in	std_ulogic
		0/ADL0
signal_0_ADL1	in	std_ulogic
		0/ADL1
signal_0_ADL2	in	std_ulogic
		0/ADL2
adl_bus	out	std_ulogic_vector ( 7 downto 0 ) := ( others = > ' Z ' )
		ADL bus output.

Detailed Description

Open drain MOSFET for ADL bus implementation.

Member Data Documentation

adl_bus

adl_bus out std_ulogic_vector ( 7 downto 0 ) := ( others = > ' Z ' )

Port

ADL bus output.

signal_0_ADL0

signal_0_ADL0 in std_ulogic

Port

0/ADL0

signal_0_ADL1

signal_0_ADL1 in std_ulogic

Port

0/ADL1

signal_0_ADL2

signal_0_ADL2 in std_ulogic

Port

0/ADL2

---

The documentation for this design unit was generated from the following file:

• cores/ricoh_2A03/datapath/adl_open_drain_mosfet.vhdl